Митап
Co-Packaged Optics with Silicon Photonics for Chiplets Heterogeneous Integration
- 12 нояб. 2026 г., 16:00–18:00 GMT-8
- Qualcomm Building Q Auditorium, San Diego, Соединенные Штаты
О событии
Co-packaged optics (CPO) are heterogeneous integration packaging methods to integrate the optical engine (OE) which consists of photonic ICs (PIC) such as the laser and photodiodes, and the electrical engine (EE) which consists of the electronic ICs (EIC) such as the laser driver and transimpedance amplifiers (TiA). The advantages of CPO are: (a) to reduce the length of the electrical interface between the OE/EE (or PIC/EIC) and the ASIC, (b) to reduce the energy required to drive the signal, and (c) to cut the latency which leads to better electrical performance. In the next few years, we will see more implementations of a higher level of heterogeneous integration of EIC and PIC with silicon photonics, whether it is for performance, form factor, power consumption or cost. The content of this lecture is shown below. Introduction Data Centers Optical Transceivers PIC and EIC OBO (on-board optics), NPO (near-board optics), CPO (co-packaged optics) 3D Integration of the PIC and EIC 3D Heterogeneous Integration of ASIC Switch, PIC and EIC 3D Heterogeneous Integration of ASIC Switch, PIC and EIC with Bridges 3D Heterogeneous Integration of ASIC Switch, EIC and PIC with Glass Packaging CPO with Silicon Photonics Summary and Recommendations The schedule is as follows: 4-4.30 pm - Networking 4.30-6 pm - Lecture